In case of nested subroutines the return addresses are stored in . . . . . . . .
In case of nested subroutines the return addresses are stored in . . . . . . . .
The logical addresses generated by the cpu are mapped onto physical memory by .
The logical addresses generated by the cpu are mapped onto physical memory by . . . . . . . .
If a processor clock is rated as 1250 million cycles per second, then its clock
If a processor clock is rated as 1250 million cycles per second, then its clock period is . . . . . . ….
The software which governs the group of computers is . . . . . . . .
The software which governs the group of computers is . . . . . . . .
. . . . . . . . bus structure is usually used to connect I/O devices.
. . . . . . . . bus structure is usually used to connect I/O devices.
The parallel mode of communication is not suitable for long devices because of .
The parallel mode of communication is not suitable for long devices because of . . . . . . . .
The decoded instruction is stored in . . . . . . . .
The decoded instruction is stored in . . . . . . . .
In double precision format, the size of the mantissa is . . . . . . . .
In double precision format, the size of the mantissa is . . . . . . . .
CISC stands for . . . . . . . .
CISC stands for . . . . . . . .
When the processor executes multiple instructions at a time it is said to use .
When the processor executes multiple instructions at a time it is said to use . . . . . . . .
The completion of the memory operation is indicated using . . . . . . . . signal
The completion of the memory operation is indicated using . . . . . . . . signal.
The size of the floating registers can be extended upto . . . . . . . .
The size of the floating registers can be extended upto . . . . . . . .